1. Field of the Invention
The present invention relates to semiconductor packages and methods of fabricating the same, and, more particularly, to a flip-chip semiconductor package and a method of fabricating the same.
2. Description of Related Art
Along with the rapid development of electronic industries, electronic products are developed towards miniaturization, multi-function, high electrical performance and high speed. For example, along with integration of fabrication processes of front-end semiconductor chips, electrode pads of high density are provided on active surfaces of semiconductor chips to serve as I/O terminals. Accordingly, semiconductor packages such as fan out wafer-level chip-scaled packages that have interconnection structures for fanning out signals from the electrode pads have been developed.
To form such a semiconductor package, semiconductor elements such as semiconductor chips are disposed on a carrier and encapsulated by an encapsulant, and subsequently the carrier is removed so as to form interconnection structures on the semiconductor elements. Referring to FIG. 3A, an adhesive layer 32 is formed on an entire surface of the carrier 30. Then, a plurality of semiconductor elements 36 are disposed on the adhesive layer 32 at predefined positions A. Thereafter, referring to FIG. 3B, an encapsulant 37 is formed on the adhesive layer 32 to encapsulate the semiconductor elements 36. However, the adhesive layer 32 easily expands or contracts when temperature changes during a molding process, thus causing deviations of the semiconductor elements 36 from the predefined positions A and adversely affecting alignment accuracy in the molding process and subsequent processes. Hence, for example, build-up structures formed on the semiconductor elements cannot be electrically connected to the semiconductor elements, thus reducing the product yield.
Therefore, there is a need to provide a semiconductor package and a fabrication method thereof so as to overcome the above-described drawbacks.